A Low Phase Noise Ring Oscillator Phase-Locked Loop for Wireless Applications
نویسندگان
چکیده
This thesis describes the circuit level design of a 900MHz EA ring oscillator based phase-locked loop using 0.35um technology. Multiple phase noise theories are considered giving insight into low phase-noise voltage controlled oscillator design. The circuit utilizes a fully symmetric differential voltage controlled oscillator with cascode current starved inverters to reduces current noise. A compact multi-modulus prescaler is presented, based on modified true single-phase clock flip-flops with integrated logic. A fully differential charge pump with switched-capacitor common mode feedback is utilized in conjunction with a nonlinear phase-frequency detector for accelerated acquisition time. Thesis Supervisor: James K. Roberge Title: Professor of Electrical Engineering
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